Field of the Invention
The present invention relates to a printed wiring board which has a core substrate, a buildup layer on the core substrate and a solder-resist layer on the buildup layer.
Description of Background Art
Japanese Laid-Open Patent Publication No. 2002-198650 describes a multilayer wiring board having a substrate body, and buildup layers on the substrate body. In Japanese Laid-Open Patent Publication No. 2002-198650, the thickness of the substrate body is set at less than 500 μm to reduce loop inductance. The entire contents of this publication are incorporated herein by reference.